When a semiconductor device having a multilayer structure is manufactured, alignment accuracy between respective layers largely affects performance and quality of the semiconductor device. For this reason, in technical development of a manufacturing process, production engineering development, and manufacturing line, improvement and management of the alignment accuracy are important issues. In a lithography process, respective layers with various elements formed needs to be aligned with each other. In the lithography process, by using an exposure apparatus having an irradiation system, a drive system, and a transfer system, a silicon wafer is exposed based on a desired circuit pattern which is transcribed on a layer of a photo-sensitive resin (hereinafter, to be referred to as a photo-resist layer). When a next circuit pattern is transcribed on the exposed layer, the exposure apparatus is required to align the next circuit pattern with the exposed layer in a high accuracy. The exposure apparatus uses an alignment mark formed previously on the silicon wafer to align the next circuit pattern. Referring to FIG. 1, an aligning process upon transcription of the circuit pattern will be described.
FIG. 1 is a conceptual diagram illustrating an exposing process in the lithography process. Referring to FIG. 1A, the exposure apparatus scans a probe beam on the silicon wafer to detect a position of the alignment mark formed on the silicon wafer. The exposure apparatus determines a position of a circuit pattern of a first layer (hereinafter, to be referred to as an alignment destination layer) transcribed on the silicon wafer from the detected position of the alignment mark. Referring to FIG. 1B, the exposure apparatus exposes and transcribes a circuit pattern of a second layer (hereinafter, to be referred to as an alignment layer) on the alignment destination layer.
As described, in a lithography process, the alignment layer is aligned on the basis of the detected position of the alignment destination layer, and by quantitatively checking alignment accuracy, a desired circuit is manufactured. The alignment accuracy largely depends on accuracy when the exposure apparatus determines the position of the alignment destination layer. That is, the alignment accuracy largely depends on the detection accuracy of the alignment mark when the exposure apparatus scans the probe beam on the alignment mark for the detection of the position of the alignment mark. The accuracy is referred to as alignment measurement accuracy by the exposure apparatus. Although the alignment measurement accuracy depends on accuracy of an alignment measurement mechanism of the exposure apparatus, it also largely depends on a structure of the alignment mark itself.
Referring to FIGS. 2 and 3, an example of the alignment mark for aligning the circuit pattern will be described. FIG. 2 is a diagram illustrating an example of a structure of an alignment mark 100 for detecting an X-coordinate of a transcribed circuit pattern. Referring to FIG. 2, the alignment mark 100 has a plurality of bar marks 101 arranged in a predetermined interval P10. The exposure apparatus scans the probe beam in an X measurement direction, and specifies a position of the alignment mark to detect the X-coordinate of the transcribed circuit pattern. A scanning direction of the probe beam is hereinafter referred to as a measurement direction. The plurality of bar marks 101 are arranged along the X measurement direction in the predetermined interval P10. The shape of the bar mark 101 is a rectangle having short sides (width: a few μm to 10 μm) in the X measurement direction and long sides in a non-measurement direction perpendicular to the X measurement direction. Also, the interval P10 between adjacent bar marks 101 is 10 μm to 100 μm, and the number of bar marks 101 of the alignment mark 100 is a few to a few tens.
FIG. 3 is a diagram illustrating an example of an alignment mark 200 for detecting a Y-coordinate of the transcribed circuit pattern. Referring to FIG. 3, the alignment mark 200 has a plurality of bar marks 201 arranged in a predetermined interval P20. The exposure apparatus scans the probe beam in a Y measurement direction, and specifies a position of the alignment mark to detect the Y-coordinate of the transcribed circuit pattern. The plurality of bar marks 201 are arranged along the Y measurement direction in the predetermined interval P20. The shape of the bar mark 201 is a rectangle having short sides (width: a few μm to 10 μm) in the Y measurement direction and long sides in a non-measurement direction perpendicular to the Y measurement direction. Also, the interval P20 between adjacent two of the bar marks 201 is 10 μm to 100 μm, and the number of bar marks 201 in the alignment mark 200 is a few to a few tens.
In recent years, in accompaniment with miniaturization of a semiconductor device, the size of a pattern to be formed as a circuit pattern is restricted (design constraint) in order to avoid a defect in a manufacturing method such as dry etching and chemical mechanical polishing (CMP). An etching rate at the time of the dry etching and a polishing amount in the CMP vary depending on a pattern size. For this reason, if a pattern size of an alignment mark is different from that of the other circuit element, a defect is generated because of a difference in etching rate or polishing amount in the CMP between the alignment mark and the ordinary pattern. To avoid such a defect, the alignment mark is required to have a pattern size (e.g., mark width less than 1 μm) subjected to the design constraint.
A technique related to the alignment mark will be described in patent literature 1 to patent literature 8.